SCI Semiconductor raises €3M: Co-founder Haydn Povey on building world’s first memory-safe chip to combat rising cyberattacks

UK-based SCI Semiconductor, a company specialised in developing the world’s first ‘memory safe’ computer chip has raised £2.5M in a funding round.

The round was led by Mercia Ventures via the Northern Powerhouse Investment Fund II (NPIF II), with backing from UK and Silicon Valley angel investors.

The £660M Northern Powerhouse Investment Fund II (NPIFII) covers the entire North of England and provides loans from £25k to £2M and equity investments up to £5M to help a range of small and medium-sized businesses to start up, scale up, or stay ahead.

Mercia Ventures is a proactive venture capital investor focused on being the first-choice partner for growth.

The VC makes equity investments of up to £10M across all sectors, with specialisms in Software, Consumer, Healthcare, and Deep Tech.  

Will Schaffer, Investment Director at Mercia Ventures, adds, “Memory safety has been a problem for years but until now has been a secondary priority. However, with the world becoming more dangerous, government and industry have woken up to the dangers. Despite collaboration between the big tech companies, no one has yet managed to build a silicon chip that addresses the issue. The funding will help SCI to win the race for memory safety and deliver next-generation security.”

The funding will enable the company to build a team of engineers in Sheffield and bring its product to market.

What does SCI Semiconductor solve?

The UK company aims to resolve the problem of ‘memory safety’ which is the key factor in around 70 per cent of cyber attacks.

Traditional programming languages – on which Microsoft’s Windows and many industrial operating systems are based –  allow memory to be freely accessed, which provides flexibility for software developers but also creates vulnerabilities.

And here’s where SCI Semiconductor is looking to address the issue, not through software, but at the hardware level.

“Fundamentally, the move to hardware has been driven by decades of research and frustration with computer architecture,” says Haydn Povey, CEO and co-founder of SCI Semiconductor to Silicon Canals.

“The first critical vulnerabilities related to Memory Safety were identified around 1972, and in the interviewing 50 years, the industry has been attempting to patch and mitigate via MMUs, hypervisors, and other metrics without strong success.”

Povey says that SCI Semiconductor needed to develop a chip that came out of the UK government’s Digital Security by Design (DSbD) program.

“The government has invested strongly in the CHERI technology, supporting the development of Arm’s Morello test chip and other activities. Unfortunately, despite this investment, there was simply no commercial solution – it was impossible for customers to ‘purchase’ CHERI, hence the creation of SCI Semiconductor and our ICENI devices. This has led to our current partnership with Microsoft and Google to support the management and maturing of the CHERIoT processor core, alongside many other activities,” he adds.

A complex, costly problem the industry avoided

Despite being responsible for the majority of cyberattacks, memory safety has remained an under-addressed issue in the tech industry for decades.

According to Haydn Povey, CEO of SCI Semiconductor, the answer lies in the sheer complexity and cost involved.

“The reality is that it’s just been too hard to fix commercially. The problem spans the entire digital domain and demands deep pockets and deep expertise.”

The technical challenge has caused the industry to move slowly. Most tech experts focus on creating applications instead of solving basic computing issues like memory pointers.

“It lives in the perfect storm—an issue that’s incredibly technical to resolve, massively expensive to fix, and hard for even seasoned computer scientists to fully visualise,” Povey says.

However, the tides are shifting. Povey praises initiatives by DARPA, SRI International, and the University of Cambridge for laying the groundwork that now allows for practical solutions.

With critical infrastructure increasingly targeted and national economies at risk, governments are finally stepping in, and the market is catching up.

“Only now, with national security on the line and governments dictating requirements, is the industry ready for a new phase in computing,” he adds.

SCI: Developing the world’s first memory chip

Founded in 2022 by Haydn Povey and Krishna Anne, SCI created a chip that improves security by dividing memory into sections and controlling access.

This chip works with open-source software and development tools, helping to reduce cybersecurity costs and eliminate the need for frequent updates.

SCI’s ICENI family of chips, due to launch later this year, will be the first products based on CHERI technology, a framework developed by the University of Cambridge and supported by the UK and US governments.

The company aims to set a new standard in secure computing for the critical infrastructure, defence, automotive, and medical markets.

Keeping it relevant

SCI Semiconductor is building its chip architecture with a long-term view, recognising that cyber threats will only continue to evolve.

However, the company believes that solving memory safety vulnerabilities can tip the scales significantly. “The threats do continue to evolve, but the vast majority utilised basic memory safety failures to create zero-day attacks and other exploits. Hence, solving Memory Safety issues will massively impact the balance, requiring that bad actors have multiple simultaneous exploits in a system to take control,” says CEO Haydn Povey.

By addressing these core vulnerabilities, SCI expects its chips to ease the constant race to patch systems after each new exploit.

“This will additionally ensure that patching cycles become less challenging, as even with one, two or three compromises in a system, we believe the bad guys will not be able to root devices successfully,” Povey explained.

The use of CHERI architecture introduces a powerful layer of internal defence by separating memory into tightly controlled segments.

“Beyond the Memory Safe technology CHERI also implements robust Compartmentalisation, and this additionally reduces the ‘blast radius’ of attacks. Hence even if a point of attack is found, providing the system has been designed and constructed correctly, it will be possible to restart and replace the compartment washing out attacks,” he adds.

While no system can claim total immunity, SCI believes its chip architecture can drastically reduce exploit severity. 

“Of course, no system is perfect, and good old-fashioned phishing attacks to gain individual credentials will continue, but it is believed that through robust architectural implementation the exploits can be managed down, and systems can be increasingly robust,” Povey says.

Adopting legacy systems

Adopting new chip architectures takes time, especially for businesses reliant on legacy systems.

To ease the transition, SCI expects customers to deploy firewall boxes that act as a protective layer between the internet and the existing infrastructure.

“We have seen in trials all of the critical vulnerabilities of communication protocols mitigated by the CHERIoT implementations we have developed,” says Povey. “Once we have confidence that the communications channel is clean, we can subsequently utilise compartmentalisation to individually operate the edge systems with higher confidence than that provided by hypervisors or other component models.