UK’s Agile Analog raises €15.6M to go global with its analog IP technology

In the semiconductor industry, the demand for analog IP is increasing as System-on-Chip (SoCs) and Application-specific Integrated Circuits (ASICs) are becoming more complex and have reached higher levels of integration. And to address the diverse requirements of applications, the number of silicon processes and process variants is also increasing. This is where Agile Analog is looking to disrupt the analog IP market.

Agile Analog raises funding

With an aim to provide a wide range of analog IP, UK-based Agile Analog, has raised $19M (approx €15.64M) in a fresh round of funding. The round was led by OMERS Ventures. In addition, the company also saw participation from existing investors including Delin Ventures, firstminute capital, and MMC Ventures.

Analog IP needs to be different for each design

Founded in 2017 by Pete Hutton, Agile Analog provides a wide range of analog IP. The company makes it possible for ASIC or SoC manufacturers to configure analog IP to fit their application and chosen silicon process, required by the customer, to mould their chip design to fit a limited range of one-size-fits-all, standard analog IP products.

Henry Gladwyn, Partner at OMERS Ventures, saus, “Agile Analog has the potential for scale. Every other analog IP supplier is restricted to selling a limited range of standard IP products. But because Agile Analog’s unique technology enables it to create the IP that the customer wants, it can satisfy a wider range of customer requirements, and integrate more functionality into a chip design.”

Gladwyn also mentions that the company is not limited by the size of today’s analog IP market and hence its addressable market is potentially as big as the analog chip market. According to Agile Analog, the finance will support the increasing availability, range, and quality of analog IP to expand the total market size to $4B by 2025.

Technology to remove critical bottlenecks in the semiconductor industry supply chain

According to Pete Hutton, executive chairman of Agile Analog, “The first chapter in Agile Analog’s story was about developing an automated process for generating high quality configurable analog IP which can be verified at every stage up to right-first-time tape-out. This successful funding round marks the start of the next chapter: the technology and process are proven with a range of customers from OEMs to Tier 1 semiconductor companies. So now it’s time to enable all semiconductor companies and the increasing number of OEMs who are designing their own silicon.”

According to Agile Analog, to date, analog design has been a laborious and manually-intensive process, resulting in IP that is either very specific and costly to change, or one-size-fits-all IP that is inefficient on area and power. 

Besides, the lengthy design process also indicated that the availability of analog IP is restricted to a subset of silicon processes, forcing chip designers to choose a process that is not best suited to their application.

“Everyone is looking to shorten development cycles, increase integration, improve die area utilisation and enhance system performance. By configuring analog IP the way the customer wants it and on any process node, we can enable them to gain all these benefits,” says Hutton.

Capital utilisation

The raised capital will enable Agile Analog to increase its commercial and engineering support teams. In addition, the company will also expand its team in North America, and open a Taiwan office for sales and application engineering staff serving the Asian market. 

Besides, Agile Analog is in a recruiting process of development engineers to be based at its Cambridge, UK headquarters and across Europe. The aim is to double its headcount growing to over 100 people in the next 12 months.

Other than expanding its team, the proceeds from this round will help Agile Analog to expand its technology offering and sales footprint, in Asia and North America. Part of the funding will be used for technology development, enhancing process support, and increasing the range of analog IP supported. 

Agile Analog IP, which is already compatible with almost all analog CMOS processes, including advanced FINFET processes, will also expand the number of foundries supported. IP currently supported includes security, data conversion, power management, audio, signal processing and timing. This functional coverage will be extended to satisfy increased customer demands.