GRENOBLE, France–(BUSINESS WIRE)–#AllegroDVT–Allegro DVT, a leading provider of Video codec compliance streams and silicon video IP solutions has launched a complete range of MPEG-5 LCEVC products comprising LCEVC compliance streams and LCEVC hardware decoder and encoder video IPs (D301 and E301).
Allegro DVT’s LCEVC Compliance Streams are crucial to confirm that decoder implementations adhere to the LCEVC standard. They are used by all companies developing SoCs or devices with LCEVC decoding capabilities.
Furthermore, Allegro DVT is also releasing its E301 LCEVC Encoding HW IP which complements its D301 LCEVC Decoding HW IP that was previously announced at NAB in April 2023. This full range of LCEVC HW IPs is suitable for integration into SoCs/ASICs requiring HW based support for LCEVC encoding and decoding functions.
The E301 is the industry’s first LCEVC encoding IP solution and was developed in close collaboration with V-Nova, the inventor of the LCEVC technology. It is optimized for power and silicon area, allows system-on-chip (SoC) and ASIC designers to easily integrate LCEVC encoding into their products. It supports picture resolution up to 8K, pixel widths from 8 to 12-bits and chroma subsampling formats ranging from 4:2:0 up to 4:4:4. The IP also features fast and easy SoC integration and is delivered with full user configurable control software.